x86_silk_map.c File Reference

#include "celt/x86/x86cpu.h"
#include "structs.h"
#include "SigProc_FIX.h"
#include "pitch.h"
#include "main.h"

Variables
opus_int(*const	SILK_VAD_GETSA_Q8_IMPL [OPUS_ARCHMASK+1])(silk_encoder_state *psEncC, const opus_int16 pIn[])
void(*const	SILK_NSQ_IMPL [OPUS_ARCHMASK+1])(const silk_encoder_state *psEncC, silk_nsq_state *NSQ, SideInfoIndices *psIndices, const opus_int32 x_Q3[], opus_int8 pulses[], const opus_int16 PredCoef_Q12[2 *MAX_LPC_ORDER], const opus_int16 LTPCoef_Q14[LTP_ORDER *MAX_NB_SUBFR], const opus_int16 AR2_Q13[MAX_NB_SUBFR *MAX_SHAPE_LPC_ORDER], const opus_int HarmShapeGain_Q14[MAX_NB_SUBFR], const opus_int Tilt_Q14[MAX_NB_SUBFR], const opus_int32 LF_shp_Q14[MAX_NB_SUBFR], const opus_int32 Gains_Q16[MAX_NB_SUBFR], const opus_int pitchL[MAX_NB_SUBFR], const opus_int Lambda_Q10, const opus_int LTP_scale_Q14)
void(*const	SILK_VQ_WMAT_EC_IMPL [OPUS_ARCHMASK+1])(opus_int8 *ind, opus_int32 *rate_dist_Q14, opus_int *gain_Q7, const opus_int16 *in_Q14, const opus_int32 *W_Q18, const opus_int8 *cb_Q7, const opus_uint8 *cb_gain_Q7, const opus_uint8 *cl_Q5, const opus_int mu_Q9, const opus_int32 max_gain_Q7, opus_int L)
void(*const	SILK_NSQ_DEL_DEC_IMPL [OPUS_ARCHMASK+1])(const silk_encoder_state *psEncC, silk_nsq_state *NSQ, SideInfoIndices *psIndices, const opus_int32 x_Q3[], opus_int8 pulses[], const opus_int16 PredCoef_Q12[2 *MAX_LPC_ORDER], const opus_int16 LTPCoef_Q14[LTP_ORDER *MAX_NB_SUBFR], const opus_int16 AR2_Q13[MAX_NB_SUBFR *MAX_SHAPE_LPC_ORDER], const opus_int HarmShapeGain_Q14[MAX_NB_SUBFR], const opus_int Tilt_Q14[MAX_NB_SUBFR], const opus_int32 LF_shp_Q14[MAX_NB_SUBFR], const opus_int32 Gains_Q16[MAX_NB_SUBFR], const opus_int pitchL[MAX_NB_SUBFR], const opus_int Lambda_Q10, const opus_int LTP_scale_Q14)

Variable Documentation

SILK_NSQ_DEL_DEC_IMPL

void(*const SILK_NSQ_DEL_DEC_IMPL[ OPUS_ARCHMASK + 1 ])(const silk_encoder_state *psEncC, silk_nsq_state *NSQ, SideInfoIndices *psIndices, const opus_int32 x_Q3[], opus_int8 pulses[], const opus_int16 PredCoef_Q12[2 *MAX_LPC_ORDER], const opus_int16 LTPCoef_Q14[LTP_ORDER *MAX_NB_SUBFR], const opus_int16 AR2_Q13[MAX_NB_SUBFR *MAX_SHAPE_LPC_ORDER], const opus_int HarmShapeGain_Q14[MAX_NB_SUBFR], const opus_int Tilt_Q14[MAX_NB_SUBFR], const opus_int32 LF_shp_Q14[MAX_NB_SUBFR], const opus_int32 Gains_Q16[MAX_NB_SUBFR], const opus_int pitchL[MAX_NB_SUBFR], const opus_int Lambda_Q10, const opus_int LTP_scale_Q14)

Initial value:

= {
  silk_NSQ_del_dec_c,                  
  silk_NSQ_del_dec_c,
  silk_NSQ_del_dec_c,
  MAY_HAVE_SSE4_1( silk_NSQ_del_dec ), 
  MAY_HAVE_SSE4_1( silk_NSQ_del_dec )  
}

SILK_NSQ_IMPL

void(*const SILK_NSQ_IMPL[ OPUS_ARCHMASK + 1 ])(const silk_encoder_state *psEncC, silk_nsq_state *NSQ, SideInfoIndices *psIndices, const opus_int32 x_Q3[], opus_int8 pulses[], const opus_int16 PredCoef_Q12[2 *MAX_LPC_ORDER], const opus_int16 LTPCoef_Q14[LTP_ORDER *MAX_NB_SUBFR], const opus_int16 AR2_Q13[MAX_NB_SUBFR *MAX_SHAPE_LPC_ORDER], const opus_int HarmShapeGain_Q14[MAX_NB_SUBFR], const opus_int Tilt_Q14[MAX_NB_SUBFR], const opus_int32 LF_shp_Q14[MAX_NB_SUBFR], const opus_int32 Gains_Q16[MAX_NB_SUBFR], const opus_int pitchL[MAX_NB_SUBFR], const opus_int Lambda_Q10, const opus_int LTP_scale_Q14)

Initial value:

= {
  silk_NSQ_c,                  
  silk_NSQ_c,
  silk_NSQ_c,
  MAY_HAVE_SSE4_1( silk_NSQ ), 
  MAY_HAVE_SSE4_1( silk_NSQ )  
}

SILK_VAD_GETSA_Q8_IMPL

opus_int(*const SILK_VAD_GETSA_Q8_IMPL[ OPUS_ARCHMASK + 1 ])(silk_encoder_state *psEncC, const opus_int16 pIn[])

Initial value:

= {
  silk_VAD_GetSA_Q8_c,                  
  silk_VAD_GetSA_Q8_c,
  silk_VAD_GetSA_Q8_c,
  MAY_HAVE_SSE4_1( silk_VAD_GetSA_Q8 ), 
  MAY_HAVE_SSE4_1( silk_VAD_GetSA_Q8 )  
}

SILK_VQ_WMAT_EC_IMPL

void(*const SILK_VQ_WMAT_EC_IMPL[ OPUS_ARCHMASK + 1 ])(opus_int8 *ind, opus_int32 *rate_dist_Q14, opus_int *gain_Q7, const opus_int16 *in_Q14, const opus_int32 *W_Q18, const opus_int8 *cb_Q7, const opus_uint8 *cb_gain_Q7, const opus_uint8 *cl_Q5, const opus_int mu_Q9, const opus_int32 max_gain_Q7, opus_int L)

Initial value:

= {
  silk_VQ_WMat_EC_c,                  
  silk_VQ_WMat_EC_c,
  silk_VQ_WMat_EC_c,
  MAY_HAVE_SSE4_1( silk_VQ_WMat_EC ), 
  MAY_HAVE_SSE4_1( silk_VQ_WMat_EC )  
}